Branch Prediction in Hardcaml for a RISC-V 32im CPU

Accurate branch prediction is a critical part of high performance instructionstream processing. In this paper, I present a hardware implementation of branchprediction for a RV32IM CPU, starting with static decode stage predictions andculminating in the use of BATAGE. In addition, I detail my experience writingthe RTL in Hardcaml, a hardware description library for the functionalprogramming language OCaml.