Open AccessVLSI Design of Low Cost (PUF) Physical Unclonable Function Using FPGA and Highly Secured Clock Network
Author(s) -
N Muthumeenakshi.,
Hari Prasath Sharma. S,
M Farjanaaameera.,
R. Rajaprabha
Publication year - 2014
Publication title -
iosr journal of vlsi signal processing
Language(s) - English
Resource type - Journals
eISSN - 2319-4200
pISSN - 2319-4197
DOI - 10.9790/4200-04111621
Subject(s) - physical unclonable function , field programmable gate array , very large scale integration , embedded system , computer science , computer architecture , computer hardware , arbiter