Open AccessA Fully Pipelined Power-Optimization Implementation of Monte Carlo Based SSTA on FPGA
Author(s) -
Satheesh Rao
Publication year - 2013
Publication title -
iosr journal of vlsi signal processing
Language(s) - English
Resource type - Journals
eISSN - 2319-4200
pISSN - 2319-4197
DOI - 10.9790/4200-0321116
Subject(s) - computer science , field programmable gate array , monte carlo method , power (physics) , computer architecture , reliability engineering , parallel computing , embedded system , statistics , physics , mathematics , quantum mechanics , engineering