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RTL Implementation of Viterbi Decoder using VHDL
Author(s) -
Hiral Pujara
Publication year - 2013
Publication title -
iosr journal of vlsi signal processing
Language(s) - English
Resource type - Journals
eISSN - 2319-4200
pISSN - 2319-4197
DOI - 10.9790/4200-0216571
Subject(s) - viterbi decoder , soft decision decoder , vhdl , computer science , viterbi algorithm , soft output viterbi algorithm , decoding methods , programming language , parallel computing , arithmetic , computer hardware , algorithm , mathematics , sequential decoding , field programmable gate array , block code

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