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Design of High Speed Phase Frequency Detector in 0.18 μm CMOS Process for PLL Application
Author(s) -
Abhinav V. Deshpande
Publication year - 2016
Publication title -
international journal of computer applications technology and research
Language(s) - English
Resource type - Journals
ISSN - 2319-8656
DOI - 10.7753/ijcatr0506.1004
Subject(s) - phase locked loop , computer science , cmos , process (computing) , detector , pll multibit , phase detector , electronic engineering , computer hardware , electrical engineering , optoelectronics , telecommunications , materials science , operating system , jitter , voltage , engineering

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