
Compact and Low Loss Microwave Idlers for Low Frequency Integrated Circuits
Author(s) -
Shubhangi Singh,
Subhash Chandra Bera,
Dhaval Pujara
Publication year - 2019
Publication title -
advanced electromagnetics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.242
H-Index - 15
ISSN - 2119-0275
DOI - 10.7716/aem.v8i3.1040
Subject(s) - harmonics , microwave , monolithic microwave integrated circuit , harmonic , electrical engineering , printed circuit board , frequency multiplier , microstrip , electronic engineering , engineering , frequency mixer , realization (probability) , radio frequency , acoustics , physics , telecommunications , cmos , mathematics , voltage , amplifier , statistics
Two design methodologies for realization of low frequency (less than 20 GHz) compact and low loss microwave idlers have been proposed in this paper. Such idlers can be used for realizing low frequency higher order (6X or more) harmonic mixers or multipliers on monolithic integrated technology. Low frequency higher order harmonic mixers or multipliers are generally avoided due to higher losses and board space consumed by multiple idlers. The present proposed methods of idler design are based on realization of idlers by combining distributed microstrip transmission line and lumped components. The approach helps in transmitting the desired frequency with lower insertion loss and providing more rejection to the undesired frequencies. The design proposal has been demonstrated by designing an idler for 3 GHz LO side of a 6X harmonic MMIC mixer. This mixer utilizes 6th harmonic of the 3 GHz LO for generating 18 GHz output RF signal by frequency mixing. The idler for 3 GHz LO rejects dc, IF and selective even harmonics of LO; 6 GHz, 12 GHz and 18 GHz. On wafer test results of the developed 6X harmonic MMIC mixer has substantiated the idler design.