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Gate capacitance model of AlGaN/GaN high electron mobility transistor
Author(s) -
华南理工大学,
华南理工大学电子与信息学院
Publication year - 2021
Publication title -
wuli xuebao
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.199
H-Index - 47
ISSN - 1000-3290
DOI - 10.7498/aps.70.20210700
Subject(s) - capacitance , differential capacitance , materials science , high electron mobility transistor , parasitic capacitance , optoelectronics , capacitance probe , transistor , physics , voltage , electrode , quantum mechanics
The research on capacitance model of AlGaN/GaN high electron mobility transistor (HEMT) is of great significance in modern communication technology and circuit simulation. At present, many modeling methods of AlGaN/GaN HEMT capacitance models have been proposed. The gate capacitance is composed of intrinsic capacitance and fringe capacitance. However, most researches focus on the intrinsic capacitance but ignore the fringe capacitance, which leads to a large error in the final results. A total gate capacitance model including fringe capacitance needs to be established. In this paper, the conformal mapping method and transition functions are used to establish the inner fringe capacitance model, and the intrinsic capacitance model is derived based on the Ward-Dutton charge distribution principle. The intrinsic capacitance model and the outer fringe capacitance model are combined to obtain the source/drain total gate capacitance model. Based on this model, the relationship between the bias condition and the fringe capacitance is analyzed. We compare the difference between the effects of external bias on gate capacitance with and without the fringe capacitance considered, and the error rate of the gate capacitance in the on state is calculated without considering the fringe capacitance. The results show that the fringe capacitance is mainly affected by the gate bias. When the fringe capacitance is taken into account in the intrinsic capacitance model, the total capacitance model is larger than that without considering the fringe capacitance. For the gate capacitance, if the influence of fringing capacitance is not considered, the gate capacitance error rate of the device in the OFF state can reach 80%; for fringing capacitance, the error rate is over 65% when the device is working in the saturation region.

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