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Mechanism of multiple bit upsets induced by localized latch-up effect in 90 nm complementary metal semiconductor static random-access memory
Author(s) -
Rui Chen,
Yu Yang,
Shangguan Shipeng,
Feng Gao,
Jianwei Han
Publication year - 2014
Publication title -
wuli xuebao
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.199
H-Index - 47
ISSN - 1000-3290
DOI - 10.7498/aps.63.128501
Subject(s) - static random access memory , cmos , upset , single event upset , random access , optoelectronics , materials science , electronic engineering , computer science , computer hardware , engineering , mechanical engineering , operating system
By using the pulsed laser single effect facility, the single event upset and latch-up phenomenon are studied, and the bitmap of 90 nm complementary metal oxide semiconductor (CMOS) static random-access memory (SRAM) is mapped. It is shown that many multiple bit upsets occur and pulsed supply current of 20 mA amplitude is monitored. Based on the technology computer aided design (TCAD), it is found that the localized latch-up in CMOS SRAM is the main reason for the single event multiple bit upsets. Finally, by analyzing the results of the pulsed laser experiment and TCAD, it is found that the P/N well potential collapse is the key physical mechanism responsible for the spreading of the single event latch-up effect in 90 nm CMOS SRAM.

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