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Total ionizing dose effects on n-channel metal oxide semiconductor transistors with annular-gate and ring-gate layouts
Author(s) -
Fei Xue,
Wei Li,
Ping Li,
Bin Zhang,
Xiaojun Xie,
Gang Wang,
Hu Bin,
Zhai Ya-Hong
Publication year - 2012
Publication title -
wuli xuebao
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.199
H-Index - 47
ISSN - 1000-3290
DOI - 10.7498/aps.61.016106
Subject(s) - nmos logic , gate oxide , materials science , optoelectronics , threshold voltage , transistor , cmos , leakage (economics) , metal gate , absorbed dose , mosfet , voltage , radiation , electrical engineering , optics , physics , economics , macroeconomics , engineering
Two-edged-gate, annular-gate and ring-gate N-channel metal oxide semiconductor (NMOS) transistors with two different values of gate oxide thickness (tox) are fabricated in a commercial 0.35 m complementary metal oxide semiconductor (CMOS) process. The tests for the total ionizing dose (TID) effects of the transistors are carried out with a total dose up to 2000 Gy(Si). The results show that the dependence of radiation-induced threshold voltage shift on tox is larger than the power-law tox3. The TID tolerance of the low voltage NMOS (tox=11 nm) is improved from 300 Gy(Si) to over 2000 Gy(Si) by the annular-gate or ring-gate layout. For the high voltage NMOS (tox=26 nm), the annular-gate or ring-gate layout can only mitigate the growth of the off-state leakage current when the total dose is less than 1000 Gy(Si). As radiation hardening techniques, the annular-gate and ring-gate layouts have similar effects, but the annular-gate layout is slightly more effective in terms of the radiation-induced threshold voltage shift and off-state leakage current increase. The test results are theoretically explained by examining and analyzing the experimental data.

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