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Performance optimization of carbon nanotube field effect transistors based on stair-case doping strategy
Author(s) -
Hailiang Zhou,
Yaqing Chi,
Minxuan Zhang,
Liang Fang
Publication year - 2010
Publication title -
wuli xuebao
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.199
H-Index - 47
ISSN - 1000-3290
DOI - 10.7498/aps.59.8104
Subject(s) - doping , materials science , field effect transistor , ambipolar diffusion , carbon nanotube field effect transistor , transistor , carbon nanotube , optoelectronics , quantum tunnelling , nanotechnology , electrical engineering , physics , electron , engineering , quantum mechanics , voltage
The ambipolar transporting characteristic is one of the most important factors that prevent the performance of Carbon Nanotube Field Effect Transistors (CNFETs) from further being improved. In order to reduce the ambipolar conductance and increase the ON-OFF current ratio of the device,a stair-case doping strategy in drain lead,which is suitable for not only the Conventional MOS-like CNFETs (C-CNFETs) but also Tunneling CNFET (T-CNFETs),is proposed in this paper. The non-equilibrium Greens function based simulation results show that this strategy can reduce the ambipolar conductance and increase the ON-OFF current ratio of the device effectively. Further study shows that many differences exist with using this stair-case doping strategy applied in C-CNFETs and T-CNFETs. First,the potential band pinning in stair-case doped C-CNFETs would weaken the ON-state performance of the device,while no band pinning exists in stair-case doped T-CNFETs. Second,applying such a stair-case doping strategy to both source and drain leads can further increase the device performances in C-CNFETs but not T-CNFEts. Third,the transporte property of T-CNFETs is dependent more strongly on the width of lightly doped drain region than that of C-CNFETs. However,certain device area would be costly because of using this stair-case doping strategy. So,much attention should be paid to the choice of device structure,doping concentration and lightly doped drain region width,to obtain a best tradeoff among speed,power and device area,in application.

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