Open AccessProcess-induced mechanical stress effects on deep submicron CMOS device
Author(s) -
Rui Li,
Qingdong Wang
Publication year - 2008
Publication title -
wuli xuebao
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.199
H-Index - 47
ISSN - 1000-3290
DOI - 10.7498/aps.57.4497
Subject(s) - stress (linguistics) , reliability (semiconductor) , materials science , shrinkage , process (computing) , dependency (uml) , cmos , computer science , chip , reliability engineering , artificial intelligence , optoelectronics , composite material , engineering , philosophy , linguistics , operating system , telecommunications , physics , power (physics) , quantum mechanics
With the continuous downscaling of CMOS technology, process-induced mechanical stress effects become remarkable with the shrinkage of active region. Many processing steps individually or collectively contribute to mechanical stress development. The stress results in not only the layout dependency of device performances, but also diverse reliability issues, which would shorten the chip lifetime. In many cases, stress-related problems are determinative of IC yield. Here, based on the summary of mechanical stress sources, we review the achievements to date in observing and understanding these stress problems, and propose the prospective considerations when analyzing stress-related phenomenon.