Open AccessEffect of Oxide Thickness on GaN-based Double Gate MOSFETs
Author(s) -
Syed M. Ahmed,
Md. Tanvir Hasan
Publication year - 2020
Publication title -
the aiub journal of science and engineering
Language(s) - English
Resource type - Journals
eISSN - 2520-4890
pISSN - 1608-3679
DOI - 10.53799/ajse.v16i2.72
Subject(s) - materials science , drain induced barrier lowering , subthreshold slope , optoelectronics , oxide , threshold voltage , gate oxide , subthreshold conduction , mosfet , equivalent oxide thickness , voltage , electrical engineering , transistor , engineering , metallurgy
The effect of oxide thickness (EOT) on GaN-based double gate (DG) MOSFETs have been explored for low power switching device. The gate length (LG) of 8 nm with 4 nm underlap is considered. The device is turned off and on for gate voltage (VGS) of 0 V and 1 V, respectively. The effective oxide thickness (EOT) is varied from 1 nm to 0.5 nm and the device performance is evaluated. For EOT = 0.5 nm, the OFF-state current (IOFF), subthreshold slope (SS) and drain induced barrier lowering (DIBL) are obtained 2.97×10-8 A/μm, 69.67 mV/dec and 21.753 mV/V, respectively. These results indicate that, it is possible to minimize short channel effects (SCEs) by using smaller value of EOT.