Open AccessDesign of Wide - range Clock and Data Recovery Circuit based Dual-loop DLL using 2-step DPC
Author(s) -
Kisang Jung,
Kang-Jik Kim,
Guihan Ko,
Seong-Ik Cho
Publication year - 2012
Publication title -
the transactions of the korean institute of electrical engineers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.174
H-Index - 11
eISSN - 2287-4364
pISSN - 1975-8359
DOI - 10.5370/kiee.2012.61.2.324
Subject(s) - jitter , delay locked loop , computer science , loop (graph theory) , data recovery , cmos , dual loop , electronic engineering , clock domain crossing , phase locked loop , synchronous circuit , computer hardware , clock signal , engineering , mathematics , telecommunications , combinatorics
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