Open AccessResource Efficient Single Precision Floating Point Multiplier Using Karatsuba Algorithm
Author(s) -
K V Gowreesrinivas,
P. Samundiswary
Publication year - 2018
Publication title -
indonesian journal of electrical engineering and informatics (ijeei)
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.168
H-Index - 8
ISSN - 2089-3272
DOI - 10.52549/ijeei.v6i3.532
Subject(s) - floating point , multiplexer , multiplication (music) , multiplier (economics) , single precision floating point format , double precision floating point format , multiplication algorithm , computer science , algorithm , gas compressor , parallel computing , verilog , ieee floating point , arithmetic , scalar multiplication , computer hardware , field programmable gate array , mathematics , scalar (mathematics) , multiplexing , engineering , binary number , mechanical engineering , telecommunications , geometry , combinatorics , economics , macroeconomics