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Design and Comparison of Full Adder Using TG Based 4:1 MUX
Author(s) -
Mohammed Zeeshan A,
Kiran V
Publication year - 2022
Publication title -
international journal of research and review
Language(s) - English
Resource type - Journals
eISSN - 2454-2237
pISSN - 2349-9788
DOI - 10.52403/ijrr.20221115
Subject(s) - multiplexer , adder , pmos logic , cmos , transmission gate , nmos logic , computer science , electronic engineering , electrical engineering , transistor , voltage , engineering , multiplexing

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