Open AccessLow Power Full Scan Architecture for UART Module
Author(s) -
S Abhinav,
V Kiran
Publication year - 2022
Publication title -
international journal of research and review
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2454-2237
pISSN - 2349-9788
DOI - 10.52403/ijrr.20221106
Subject(s) - universal asynchronous receiver/transmitter , computer science , embedded system , computer hardware , scan chain , partition (number theory) , chip , operating system , integrated circuit , telecommunications , mathematics , combinatorics