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Low Power-Area Design of Full Adder Using Self Resetting Logic with GDI Technique
Author(s) -
Simran Khokha,
Rahul Reddy K
Publication year - 2016
Publication title -
international journal of vlsi design and communication systems
Language(s) - English
Resource type - Journals
eISSN - 0976-1357
pISSN - 0976-1527
DOI - 10.5121/vlsic.2016.7406
Subject(s) - adder , computer science , power (physics) , arithmetic , computer hardware , mathematics , telecommunications , physics , quantum mechanics , latency (audio)

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