Open AccessPower Optimized Datapath Units of Hybrid Embedded Core Architecture Using Clock Gating Technique
Author(s) -
T. Subhashini,
M. Kamaraju
Publication year - 2015
Publication title -
international journal of vlsi design and communication systems
Language(s) - English
Resource type - Journals
eISSN - 0976-1357
pISSN - 0976-1527
DOI - 10.5121/vlsic.2015.6604
Subject(s) - datapath , clock gating , computer science , gating , embedded system , power (physics) , power gating , core (optical fiber) , computer hardware , architecture , computer architecture , transistor , clock signal , electrical engineering , jitter , engineering , voltage , physics , clock skew , telecommunications , physiology , art , quantum mechanics , visual arts , biology
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