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128-Bit Area Efficient Reconfigurable Carry Select Adder
Author(s) -
Gurunadha Ravva
Publication year - 2016
Publication title -
international journal on cybernetics and informatics
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2320-8430
pISSN - 2277-548X
DOI - 10.5121/ijci.2016.5438
Subject(s) - adder , bit (key) , carry (investment) , computer science , arithmetic , carry save adder , computer hardware , parallel computing , telecommunications , mathematics , computer network , business , finance , latency (audio)

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