Open AccessSmall Delay Tracing Defect Testing
Author(s) -
Lakshmaiah Alluri,
Hemant Jeevan Magadum
Publication year - 2021
Language(s) - English
Resource type - Conference proceedings
DOI - 10.5121/csit.2021.112101
Subject(s) - glitch , path (computing) , tracing , convergence (economics) , computer science , delay calculation , detector , signal (programming language) , path length , electronic engineering , algorithm , propagation delay , engineering , telecommunications , computer network , economics , programming language , economic growth , operating system
This Small Delay Tracing Defect Testing detect small delay defects by creating internal signal races. The races are created by launching transitions along simultaneous two paths, a reference path and a test path. The arrival times of the transitions on a ‘convergence’ or common gate determine the result of the race. On the output of the convergence gate, a static hazard created by a small delay defect presence on the test path which is directed to the input of a scan-latch. A glitch detector is added to the scan latch which records the presence or absence of the glitch.