Open AccessHigh Speed Low Power CMOS Domino or Gate Design in 16nm Technology
Author(s) -
Koti Lakshmi P,
Rameshwar Rao
Publication year - 2015
Language(s) - English
Resource type - Conference proceedings
DOI - 10.5121/csit.2015.51312
Subject(s) - domino logic , cmos , power–delay product , electronic engineering , electronic circuit , noise immunity , domino , computer science , logic level , logic gate , node (physics) , electrical engineering , dynamic demand , power (physics) , pass transistor logic , logic family , logic synthesis , engineering , digital electronics , adder , biochemistry , chemistry , physics , quantum mechanics , catalysis , structural engineering
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