Open AccessLow Power-Area GDI & PTL Techniques Based Full Adder Designs
Author(s) -
Karthik Reddy.G,
Kavita Khare
Publication year - 2013
Language(s) - Uncategorized
Resource type - Conference proceedings
DOI - 10.5121/csit.2013.3426
Subject(s) - adder , computer science , pmos logic , nmos logic , transistor , pass transistor logic , cmos , logic gate , inverter , electronic engineering , electrical engineering , electronic circuit , voltage , engineering , algorithm
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