
Optimized CMOS Design of Full Adder using 45nm Technology
Author(s) -
Sheenu Rana,
Rajesh Mehra
Publication year - 2016
Publication title -
international journal of computer applications
Language(s) - English
Resource type - Journals
ISSN - 0975-8887
DOI - 10.5120/ijca2016909978
Subject(s) - computer science , adder , cmos , computer architecture , computer hardware , telecommunications , electronic engineering , latency (audio) , engineering