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VHDL Implementation of Fast Multiplier based on Vedic Mathematic using Modified Square Root Carry Select Adder
Author(s) -
Heena Goyal,
Shamim Akhter
Publication year - 2015
Publication title -
international journal of computer applications
Language(s) - English
Resource type - Journals
ISSN - 0975-8887
DOI - 10.5120/ijca2015906331
Subject(s) - vhdl , computer science , carry (investment) , square root , adder , arithmetic , multiplier (economics) , root (linguistics) , computer hardware , mathematics , field programmable gate array , telecommunications , geometry , finance , economics , macroeconomics , latency (audio) , linguistics , philosophy

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