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Leakage Power Reduction in CMOS VLSI Circuits
Author(s) -
Pushpa Saini,
Rajesh Mehra
Publication year - 2012
Publication title -
international journal of computer applications
Language(s) - Uncategorized
Resource type - Journals
ISSN - 0975-8887
DOI - 10.5120/8778-2721
Subject(s) - computer science , cmos , very large scale integration , leakage power , leakage (economics) , electronic circuit , reduction (mathematics) , power (physics) , electrical engineering , electronic engineering , computer architecture , embedded system , power consumption , physics , economics , macroeconomics , engineering , geometry , mathematics , quantum mechanics

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