Open AccessDesign and Comparative Analysis of High Speed and Low Power ALU Using RCA and Sklansky Adders for High-Performance Systems
Author(s) -
Alanoud Alrashdi,
Muhammad Imran Khan
Publication year - 2022
Publication title -
engineering, technology and applied science research/engineering, technology and applied science research
Language(s) - English
Resource type - Journals
eISSN - 2241-4487
pISSN - 1792-8036
DOI - 10.48084/etasr.4817
Subject(s) - adder , computer science , floorplan , application specific integrated circuit , schematic , design flow , logic synthesis , physical design , arithmetic , very large scale integration , computer architecture , computer hardware , parallel computing , electronic engineering , logic gate , circuit design , embedded system , telecommunications , mathematics , engineering , algorithm , latency (audio)
This study examines how different initial design decisions affect the area, timing, and power of technology-mapped designs. ASIC design flow, tools used during the flow, and the factors to consider to maximize the performance and power ratio are discussed. The ALU (Arithmetic Logic Unit) is a fundamental part of all processors. In this study, two ALUs were implemented using two different types of adder circuits: a Ripple Carry Adder (RCA) and a Sklansky adder. The Cadence EDA tools were used for the implementation. A comparative analysis was conducted for the two designed ALUs in terms of area, power, and timing analysis. The ALU design was also used as an example to examine the whole workflow front-end wise by constructing a block schematic and back-end wise by floorplanning, placing, and routing the physical design.