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IMPLEMENTATION OF MULTITRACK SIMULATOR IN FPGA FOR ESM SYSTEM
Author(s) -
J. Mohan Prithvi,
Deepak Kumar
Publication year - 2014
Publication title -
international journal of electronic signal and systems
Language(s) - English
Resource type - Journals
ISSN - 2231-5969
DOI - 10.47893/ijess.2014.1208
Subject(s) - modelsim , computer science , field programmable gate array , computer architecture simulator , word (group theory) , simulation , computer hardware , embedded system , vhdl , linguistics , philosophy
This project PDW Simulator aims at developing a simulator which can be used to test the processor in the absence of Receiver hardware. This simulates the 128 bit PDW along with the required control signals which will be generated by the receiver card ESM Processor. The 128 bit PD Word is organized as four 32 bit words. Two address bits are used to indicate the word address. A strobe is to be provided to indicate the presence of each word. The simulator is being planned to be developed using Xilinx ISE 10.1 and the simulated results are to be demonstrated on Modelsim simulator or on Xilinx simulator itself.

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