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BUILT IN SELF TEST FOR SAD MODULE IN MOTION ARRAY DETECTION
Author(s) -
K. K. Ghouse,
S. Aruna Mastani
Publication year - 2013
Publication title -
international journal of electronic signal and systems
Language(s) - English
Resource type - Journals
ISSN - 2231-5969
DOI - 10.47893/ijess.2013.1123
Subject(s) - adder , computer science , error detection and correction , computer hardware , motion detection , architecture , algorithm , motion (physics) , artificial intelligence , telecommunications , latency (audio) , art , visual arts
A novel method develops a built-in self-detection and correction (BISDC) architecture for motion estimation computing arrays(MECAs).Based on the error detection & correction concepts of biresidue codes, any single error in each processing element in an MECA can be effectively detected and corrected online using the proposed BISD and built-in selfcorrection circuits. Performance analysis and evaluation demonstrate that the proposed BISDC architecture performs well in error detection and correction with minor area i.e single error bit detection and correction . An advanced model has been proposed for multi bit detection using efficient adder implementation .a comparision is performed between efficient adder and processing element resultant .

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