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DESIGN OF LOW VOLTAGE LOW POWER OPERATIONAL AMPLIFIER
Author(s) -
M.I.Sudha Rayappa,
V. Surendra Babu
Publication year - 2015
Publication title -
international journal of electrical and electronics engineering
Language(s) - English
Resource type - Journals
ISSN - 2231-5284
DOI - 10.47893/ijeee.2015.1165
Subject(s) - cascade , operational amplifier , electrical engineering , switched mode power supply , electronic engineering , voltage , power supply rejection ratio , power (physics) , low voltage , amplifier , computer science , engineering , physics , cmos , quantum mechanics , chemical engineering
This Thesis presents a design of the Folded-cascade operational amplifier which leads to high gain as compared to a normal cascade circuit. In this project; specifications of analog systems into op amp level net-lists of library components is studied and simulated using XILINX. As the power-supply voltages because of the technology improvement and it are desired to reduce power supply to minimize power dissipation, many challenges are faced by the analog designer. One is to keep noise level as possible. The op-amp must be designed to with the ever decreasing power supply voltages. As the power supply voltages begin to approach 2Vt, new technique and new op-amp topology like folded cascade should be used.

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