Open AccessX-MATCHPRO: A HIGH PERFORMANCE FULL-DUPLEX LOSSLESS DATA COMPRESSOR ON A PROASIC FPGA
Author(s) -
J.L. Nunez,
Samuel T. Jones,
Stephen Bateman
Publication year - 2014
Publication title -
computing
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.184
H-Index - 11
eISSN - 2312-5381
pISSN - 1727-6209
DOI - 10.47839/ijc.1.1.74
Subject(s) - lossless compression , field programmable gate array , uncompressed video , computer science , computer hardware , data compression , gigabit , throughput , lossy compression , duplex (building) , compression ratio , gas compressor , embedded system , real time computing , engineering , algorithm , operating system , telecommunications , chemistry , wireless , video processing , mechanical engineering , dna , biochemistry , automotive engineering , video tracking , internal combustion engine
This paper presents the fullduplex architecture of the XMatchPRO lossless data compressor and its highly integrated implementation in a nonvolatile reprogrammable ProASIC FPGA. The XMatchPRO architecture offers a data independent throughput of 100 Mbytes/s and simultaneous compression/decompression for a combine fullduplex performance of 200 Mbytes/s clocking at 25 MHz. Both compression and decompression channels fit into a single A500K130 ProASIC FPGA with a typical compression ratio that halves the original uncompressed data. This device is specifically targeted to enhance the performance of Gbit/s data networks and storage applications where it can double the performance of the original system.