Open AccessLightweight and Side-channel Secure 4 × 4 S-Boxes from Cellular Automata Rules
Author(s) -
Ashrujit Ghoshal,
Rajat Sadhukhan,
Sikhar Patranabis,
Nilanjan Datta,
Stjepan Picek,
Debdeep Mukhopadhyay
Publication year - 2018
Publication title -
iacr transaction on symmetric cryptology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.715
H-Index - 10
ISSN - 2519-173X
DOI - 10.46586/tosc.v2018.i3.311-334
Subject(s) - block cipher , computer science , cryptography , side channel attack , cellular automaton , application specific integrated circuit , power analysis , block (permutation group theory) , computer engineering , theoretical computer science , parallel computing , embedded system , algorithm , mathematics , geometry
This work focuses on side-channel resilient design strategies for symmetrickey cryptographic primitives targeting lightweight applications. In light of NIST’s lightweight cryptography project, design choices for block ciphers must consider not only security against traditional cryptanalysis, but also side-channel security, while adhering to low area and power requirements. In this paper, we explore design strategies for substitution-permutation network (SPN)-based block ciphers that make them amenable to low-cost threshold implementations (TI) - a provably secure strategy against side-channel attacks. The core building blocks for our strategy are cryptographically optimal 4×4 S-Boxes, implemented via repeated iterations of simple cellular automata (CA) rules. We present highly optimized TI circuits for such S-Boxes, that consume nearly 40% less area and power as compared to popular lightweight S-Boxes such as PRESENT and GIFT. We validate our claims via implementation results on ASIC using 180nm technology. We also present a comparison of TI circuits for two popular lightweight linear diffusion layer choices - bit permutations and MixColumns using almost-maximum-distance-separable (almost-MDS) matrices. We finally illustrate design paradigms that combine the aforementioned TI circuits for S-Boxes and diffusion layers to obtain fully side-channel secure SPN block cipher implementations with low area and power requirements.