Open AccessRhythmic Keccak: SCA Security and Low Latency in HW
Author(s) -
Víctor Arribas,
Begül Bilgin,
George Petrides,
Svetla Nikova,
Vincent Rijmen
Publication year - 2018
Publication title -
iacr transactions on cryptographic hardware and embedded systems
Language(s) - English
Resource type - Journals
ISSN - 2569-2925
DOI - 10.46586/tches.v2018.i1.269-290
Subject(s) - computer science , implementation , side channel attack , cryptography , masking (illustration) , latency (audio) , completeness (order theory) , computer engineering , cryptographic primitive , theoretical computer science , computer security , cryptographic protocol , mathematics , telecommunications , programming language , art , mathematical analysis , visual arts
Glitches entail a great issue when securing a cryptographic implementation in hardware. Several masking schemes have been proposed in the literature that provide security even in the presence of glitches. The key property that allows this protection was introduced in threshold implementations as non-completeness. We address crucial points to ensure the right compliance of this property especially for low-latency implementations. Specifically, we first discuss the existence of a flaw in DSD 2017 implementation of Keccak by Gross et al. in violation of the non-completeness property and propose a solution. We perform a side-channel evaluation on the first-order and second-order implementations of the proposed design where no leakage is detected with up to 55 million traces. Then, we present a method to ensure a non-complete scheme of an unrolled implementation applicable to any order of security or algebraic degree of the shared function. By using this method we design a two-rounds unrolled first-order Keccak-