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Performance Evaluation of Datapath designs using FinFET and MOSFET
Author(s) -
Raju Hajare
Publication year - 2022
Publication title -
international journal of communications
Language(s) - English
Resource type - Journals
ISSN - 1998-4480
DOI - 10.46300/9107.2022.16.9
Subject(s) - datapath , adder , mosfet , computer science , very large scale integration , electronic circuit , electronic engineering , power–delay product , multiplier (economics) , cmos , electrical engineering , embedded system , engineering , transistor , voltage , economics , macroeconomics

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