Open AccessRegister Controlled Delay-locked Loop using Delay Monitor Scheme
Publication year - 2004
Publication title -
jeon'gi jeonja jaeryo haghoe nonmunji/jeon-gi jeonja jaeryo hakoe nonmunji
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2288-3258
pISSN - 1226-7945
DOI - 10.4313/jkem.2004.17.2.144
Subject(s) - delay locked loop , cmos , power consumption , inverter , electronic engineering , power (physics) , loop (graph theory) , lock (firearm) , computer science , shift register , voltage , scheme (mathematics) , propagation delay , electrical engineering , phase locked loop , engineering , jitter , electronic circuit , physics , mathematics , mechanical engineering , mathematical analysis , quantum mechanics , combinatorics