Open AccessA Low Distortion and Low Dissipation Power Amplifier with Gate Bias Control Circuit for Digital/Analog Dual‐Mode Cellular Phones
Author(s) -
Maeng SungJae,
Lee ChangSeok,
Youn KwangJun,
Kim Haecheon,
Mun JaeKyung,
Lee JaeJin,
Pyun KwangEui
Publication year - 1997
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.97.0197.0021
Subject(s) - amplifier , linear amplifier , electrical engineering , electronic engineering , power added efficiency , rf power amplifier , intermodulation , direct coupled amplifier , dbc , power bandwidth , adjacent channel power ratio , engineering , operational amplifier , cmos
A power amplifier operating at 3.3 V. has been developed for CDMA/AMPS dual‐mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESFET from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two‐tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than −26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be −33 dBc at a high output power of 26 dBm.