z-logo
open-access-imgOpen Access
HV‐SoP Technology for Maskless Fine‐Pitch Bumping Process
Author(s) -
Son Jihye,
Eom YongSung,
Choi KwangSeong,
Lee Haksun,
Bae HyunCheol,
Lee JinHo
Publication year - 2015
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.15.0114.0578
Subject(s) - bumping , soldering , flip chip , miniaturization , materials science , solder paste , process (computing) , mechanical engineering , engineering drawing , optoelectronics , computer science , composite material , nanotechnology , engineering , layer (electronics) , adhesive , operating system
Recently, we have witnessed the gradual miniaturization of electronic devices. In miniaturized devices, flip‐chip bonding has become a necessity over other bonding methods. For the electrical connections in miniaturized devices, fine‐pitch solder bumping has been widely studied. In this study, high‐volume solder‐on‐pad (HV‐SoP) technology was developed using a novel maskless printing method. For the new SoP process, we used a special material called a solder bump maker (SBM). Using an SBM, which consists of resin and solder powder, uniform bumps can easily be made without a mask. To optimize the height of solder bumps, various conditions such as the mask design, oxygen concentration, and processing method are controlled. In this study, a double printing method, which is a modification of a general single printing method, is suggested. The average, maximum, and minimum obtained heights of solder bumps are 28.3 μm, 31.7 μm, and 26.3 μm, respectively. It is expected that the HV‐SoP process will reduce the costs for solder bumping and will be used for electrical interconnections in fine‐pitch flip‐chip bonding.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here