Open AccessAccurate Tunable‐Gain 1/ x Circuit Using Capacitor Charging Scheme
Author(s) -
Yang ByungDo,
Heo Seo Weon
Publication year - 2015
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.15.0114.0577
Subject(s) - capacitor , voltage , resistor , electrical engineering , cmos , materials science , optoelectronics , engineering , electronic engineering
This paper proposes an accurate tunable‐gain 1/ x circuit. The output voltage of the 1/ x circuit is generated by using a capacitor charging time that is inversely proportional to the input voltage. The output voltage is independent of the process parameters, because the output voltage depends on the ratios of the capacitors, resistors, and current mirrors. The voltage gain of the 1/ x circuit is tuned by a 10‐bit digital code. The 1/ x circuit was fabricated using a 0.18 μm CMOS process. Its core area is 0.011 mm 2 ( 144 μ m × 78 μ m ) , and it consumes 278 μW atV DD = 1.8 V andf CLK = 1 MHz . Its error is within 1.7% atV IN = 0.05 V to 1 V.