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Lowering Error Floor of LDPC Codes Using an Improved Parallel WBF Algorithm
Author(s) -
Ma Kexiang,
Li Yongzhao,
Zhu Caizhi,
Zhang Hailin,
Zhang Yuming
Publication year - 2014
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.14.0213.0046
Subject(s) - low density parity check code , algorithm , decoding methods , bit (key) , error floor , computer science , bit error rate , error detection and correction , mathematics , computer security
In weighted bit‐flipping‐based algorithms for low‐density parity‐check (LDPC) codes, due to the existence of overconfident incorrectly received bits, the metric values of the corresponding bits will always be wrong in the decoding process. Since these bits cannot be flipped, decoding failure results. To solve this problem, an improved parallel weighted bit flipping algorithm is proposed. Specifically, a reliability‐saturation strategy is adopted to increase the flipping probability of the overconfident incorrectly received bits. Simulation results show that the error floor of LDPC codes is greatly lowered.

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