Open AccessNew Multiplier for a Double‐Base Number System Linked to a Flash ADC
Author(s) -
Nguyen Minh Son,
Kim Insoo,
Choi Kyusun,
Lim Jaehyun,
Choi Wonho,
Kim Jongsoo
Publication year - 2012
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.12.0211.0198
Subject(s) - multiplier (economics) , digital signal processing , computer hardware , computer science , encoder , signal processing , operand , converters , binary number , arithmetic , engineering , electrical engineering , mathematics , voltage , economics , macroeconomics , operating system
The double‐base number system has been used in digital signal processing systems for over a decade because of its fast inner product operation and low hardware complexity. This letter proposes an innovative multiplier architecture using hybrid operands. The multiplier can easily be linked to flash analog‐to‐digital converters or digital systems through a double‐base number encoder (DBNE) for realtime signal processing. The design of the DBNE and the multiplier enable faster digital signal processing and require less hardware resources compared to the binary processing method.