
Design of Group Delay Time Controller Based on a Reflective Parallel Resonator
Author(s) -
Chaudhary Girdhari,
Choi Heungjae,
Jeong Yongchae,
Lim Jongsik,
Kim Chul Dong
Publication year - 2012
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.12.0110.0689
Subject(s) - group delay and phase delay , resonator , wideband , inductance , electronic engineering , flatness (cosmology) , capacitance , bandwidth (computing) , reflection (computer programming) , computer science , topology (electrical circuits) , engineering , electrical engineering , physics , voltage , telecommunications , quantum mechanics , cosmology , electrode , programming language
In this paper, a group delay time controller (GDTC) is proposed based on a reflection topology employing a parallel resonator as the reflection termination. The design equations of the proposed GDTC have been derived and validated by simulation and experimental results. The group delay time can be varied by varying the capacitance and inductance at an operating frequency. To show the validity of the proposed circuit, an experiment was performed for a wideband code division multiple access downlink band operating at 2.11 GHz to 2.17 GHz. According to the experiment, a group delay time variation of 3±0.17 ns over bandwidth of 60 MHz with excellent flatness is obtained.