
Verification Platform with ARM‐ and DSP‐Based Multiprocessor Architecture for DVB‐T Baseband Receivers
Author(s) -
Cho Koonshik,
Chang JuneYoung,
Cho HanJin,
Cho JunDong
Publication year - 2008
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.08.0107.0129
Subject(s) - computer science , multiprocessing , baseband , embedded system , digital signal processing , dvb t , software , interface (matter) , digital video broadcasting , computer hardware , computer architecture , parallel computing , operating system , bandwidth (computing) , computer network , channel (broadcasting) , bubble , maximum bubble pressure method , orthogonal frequency division multiplexing
In this paper, we introduce a new verification platform with ARM‐ and DSP‐based multiprocessor architecture. Its simple communication interface with a crossbar switch architecture is suitable for a heterogeneous multiprocessor platform. The platform is used to verify the function and performance of a DVB‐T baseband receiver using hardware and software partitioning techniques with a seamless hardware/software co‐verification tool. We present a dual‐processor platform with an ARM926 and a Teak DSP, but it cannot satisfy the standard specification of EN 300 744 of DVB‐T ETSI. Therefore, we propose a new multiprocessor strategy with an ARM926 and three Teak DSPs synchronized at 166 MHz to satisfy the required specification of DVB‐T.