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Multi‐bit Sigma‐Delta Modulator for Low Distortion and High‐Speed Operation
Author(s) -
Kim YiGyeong,
Kwon JongKee
Publication year - 2007
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.07.0207.0140
Subject(s) - delta sigma modulation , spurious free dynamic range , linearity , integrator , electronic engineering , distortion (music) , cmos , dynamic range , delta modulation , signal (programming language) , modulation (music) , computer science , engineering , electrical engineering , physics , amplifier , pulse amplitude modulation , voltage , pulse (music) , acoustics , programming language
A multi‐bit sigma‐delta modulator architecture is described for low‐distortion performance and a high‐speed operation. The proposed architecture uses both a delayed code and a delayed differential code of analog‐to‐digital converter in the feedback path, thereby suppressing signal components in the integrators and relaxing the timing requirement of the analog‐to‐digital converter and the scrambler logic. Implemented by a 0.13 μm CMOS process, the sigma‐delta modulator achieves high linearity. The measured spurious‐free dynamic range is 89.1 dB for −6 dBFS input signal.

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