Open AccessAn Ameliorated Design Method of ML‐AHB BusMatrix
Author(s) -
Hwang Soo Yun,
Jhang Kyoung Sun,
Park Hyeong Jun,
Bae Young Hwan,
Cho Han Jin
Publication year - 2006
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.06.0205.0059
Subject(s) - microcontroller , embedded system , computer science , power consumption , power (physics) , computer hardware , physics , quantum mechanics
The multi‐layer advanced high‐performance bus (ML‐AHB) BusMatrix proposed by ARM is an excellent architecture for applying embedded systems with low power. However, there is one clock cycle delay for each master in the ML‐AHB BusMatrix of the advanced microcontroller bus architecture (AMBA) design kit (ADK) whenever a master starts new transactions or changes the slave layers. In this letter, we propose an improved design method to remove the one clock cycle delay in the ML‐AHB BusMatrix of an ADK. We also remarkably reduce the total area and power consumption of the ML‐AHB BusMatrix of an ADK with the elimination of the heavy input stages.