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Low‐Power Video Decoding on a Variable Voltage Processor for Mobile Multimedia Applications
Author(s) -
Lee Seongsoo
Publication year - 2005
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.05.0905.0002
Subject(s) - header , decoding methods , computer science , bitstream , frame (networking) , video decoder , encoder , computer hardware , real time computing , scheme (mathematics) , very large scale integration , embedded system , computer network , algorithm , mathematical analysis , mathematics , operating system
This paper proposes a novel low‐power video decoding scheme. In the encoded video bitstream, there is quite a large number of non‐coded blocks. When the number of the non‐coded blocks in a frame is known at the start of frame decoding, the workload of the video decoding can be estimated. Consequently, the supply voltage of very large‐scale integration (VLSI) circuits can be lowered, and the power consumption can be reduced. In the proposed scheme, the encoder counts the number of non‐coded blocks and stores this information in the frame header of the bitstream. Simulation results show that the proposed scheme reduces the power consumption to about 1/10 to 1/20.

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