Open AccessApplication Specific Processor Design for H.264 Decoder with a Configurable Embedded Processor
Author(s) -
Han Jin Ho,
Lee Mi Young,
Bae Younghwan,
Cho Hanjin
Publication year - 2005
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.05.0905.0001
Subject(s) - computer science , video decoder , computer hardware , decoding methods , microprocessor , entropy encoding , embedded system , motion compensation , application specific instruction set processor , quantization (signal processing) , parallel computing , computer architecture , instruction set , algorithm
An application specific processor for an H.264 decoder with a configurable embedded processor is designed in this research. The motion compensation, inverse integer transform, inverse quantization, and entropy decoding algorithm of H.264 decoder software are optimized. We improved the performance of the processor with instruction‐level hardware optimization, which is tailored to configurable embedded processor architecture. The optimized instructions for video processing can be used in other video compression standards such as MPEG 1, 2, and 4. A significant performance improvement is achieved with high flexibility. Experimental results show that we could achieve 300% performance for the H.264 baseline profile level 2 decoder.