Open AccessA Novel Process for Fabricating High Density Trench MOSFETs for DC‐DC Converters
Author(s) -
Kim Jongdae,
Roh Tae Moon,
Kim SangGi,
Park IlYong,
Yang Yil Suk,
Lee DaeWoo,
Koo JinGun,
Cho KyoungIk,
Kang Young Il
Publication year - 2002
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.02.0102.0501
Subject(s) - trench , materials science , breakdown voltage , mosfet , optoelectronics , shallow trench isolation , voltage , converters , electrical engineering , power mosfet , current density , oxide , electronic engineering , nanotechnology , engineering , transistor , layer (electronics) , physics , quantum mechanics , metallurgy
We propose a new process technique for fabricating very high‐density trench MOSFETs using 3 mask layers with oxide spacers and a self‐aligned technique. This technique reduces the device size in trench width, source, and p‐body region with a resulting increase in cell density and current driving capability as well as cost‐effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3‐2.4 µm was 100 Mcell/in 2 and a specific on‐resistance of 0.41 mΩ·cm 2 was obtained under a blocking voltage of 43 V.