Open AccessThermal Cycling Test and Simulation of Six-Side Molded Panel-Level Chip-Scale Packages (PLCSPs)
Author(s) -
John H. Lau,
Cheng-Ta Ko,
Chia-Yu Peng,
Tzvy-Jang Tseng,
Kaiming Yang,
Tim Xia,
Puru Bruce Lin,
Eagle Lin,
Leo Chang,
Hsing Ning Liu,
Curry Lin,
Yan-Jun Fan,
David Cheng,
Winnie Lu
Publication year - 2021
Publication title -
journal of microelectronics and electronic packaging
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.192
H-Index - 17
eISSN - 1555-8037
pISSN - 1551-4897
DOI - 10.4071/imaps.1421341
Subject(s) - temperature cycling , weibull distribution , soldering , reliability (semiconductor) , printed circuit board , materials science , failure mode and effects analysis , chip scale package , joint (building) , structural engineering , finite element method , composite material , chip , thermal , flip chip , engineering , electrical engineering , mathematics , statistics , adhesive , layer (electronics) , power (physics) , physics , quantum mechanics , meteorology
In this study, the reliability of the solder joints of a six-side molded panel-level chip-scale package (PLCSP) is investigated. Emphasis is placed on the thermal cycling test (−55°C Δ 125°C, 50-min cycle) of the six-side molded PLCSP on a printed circuit board. For comparison purpose, the one without six-side molded (ordinary) PLCSP is also subjected to the same test. The thermal cycling test results are plotted into a Weibull distribution, and the true Weibull slope and true characteristic life at 90% confidence are presented. The solder joint mean life ratio of these two cases and its confidence level are also determined. Furthermore, their solder joint failure location and failure mode are provided. Finally, a nonlinear, time- and temperature-dependent 3-D finite element simulation is performed for these two cases and correlated with the thermal cycling test results.