Open AccessOptimization of PCB SI Coupon Design That Minimizes Discontinuity Through via-in-Pad Plated over (VIPPO) Technique
Author(s) -
Ju Hee Lee,
Kyeongsoo Kim,
Simon Kim,
Kiseop Kim,
Kyungsoo Lee
Publication year - 2020
Publication title -
journal of microelectronics and electronic packaging
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.192
H-Index - 17
eISSN - 1555-8037
pISSN - 1551-4897
DOI - 10.4071/imaps.1227889
Subject(s) - signal integrity , discontinuity (linguistics) , classification of discontinuities , signal (programming language) , electronic engineering , printed circuit board , electronic circuit , engineering , electrical engineering , computer science , mathematics , mathematical analysis , programming language
The importance of signal integrity is emphasized as signal speed increases, and higher frequencies are applied. The Print Circuit Board (PCB) manufacturer uses signal integrity coupons that can replace the in-product circuit to measure and calculate the signal loss. In this study, we tried to minimize the discontinuous path of Delta-L coupon by using the via-in-pad plated over (VIPPO) technique to improve the signal integrity. We compared the VIPPO-applied design that has minimal discontinuity with the conventional Delta-L design. To minimize discontinuity, circuits connected to pads and via holes were removed from the outer layer, and the pads were designed directly above the via holes. First of all, we simulated the optimized design that eliminated discontinuities using signal integrity software, Simbeor. Second, we measured and verified Delta-L by using Introbotix’s Accu-Prober program. In the future, higher measurement frequencies will further increase signal loss because of unnecessary pathways and discrete signals; therefore, minimizing the effects of discontinuity will be an important issue, and using the VIPPO technique will help improve signal integrity.