Open AccessA Novel Low Power Adder-Subtractor using Efficient XOR Gates
Author(s) -
V. Elamaran,
G. Rajkumar,
S. Singh Rajpurohit,
Rohini Krishnan
Publication year - 2014
Publication title -
journal of applied sciences
Language(s) - Uncategorized
Resource type - Journals
eISSN - 1812-5662
pISSN - 1812-5654
DOI - 10.3923/jas.2014.1623.1627
Subject(s) - subtractor , xor gate , adder , carry save adder , arithmetic , power (physics) , serial binary adder , computer science , power–delay product , electronic engineering , parallel computing , mathematics , logic gate , algorithm , engineering , physics , cmos , quantum mechanics
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