CMOS VLSI Implementation of Adders with Low Leakage Power
Author(s) -
V. Elamaran,
N. Raju,
Anooj Krishnan .,
Kalagarla Abhiram .
Publication year - 2014
Publication title -
journal of applied sciences
Language(s) - English
Resource type - Journals
eISSN - 1812-5662
pISSN - 1812-5654
DOI - 10.3923/jas.2014.1550.1556
Subject(s) - adder , very large scale integration , leakage power , cmos , leakage (economics) , computer science , ultra low power , electronic engineering , power (physics) , electrical engineering , embedded system , transistor , engineering , power consumption , physics , voltage , quantum mechanics , economics , macroeconomics
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